1. Field of the Invention
The present invention relates to an alignment method for disposing an object to be inspected in position on a defect inspection apparatus in defect inspection of a semiconductor device such as a DRAM or a microcomputer, or a display device such as a TFT or a PDP. The invention also relates to a semiconductor device having a predetermined alignment mark.
2. Background of the Invention
The defect inspection is carried out halfway through a manufacturing process of the semiconductor device or the display device. The defect inspection apparatus requires accurate positioning of a testing chip that may be any part of a testing object, such as a semiconductor device, on a stage. Thus, an alignment mark for alignment is attached to the chip.
FIG. 28 is a plan view showing the component of a chip 200 on the testing object. A rectangular alignment mark 100 is attached to the chip. In order to ensure exact alignment motion on the chip 200, an operator specifies a predetermined alignment point on the alignment mark 100 and teaches the coordinates of the alignment point and alignment mark image to the defect inspection apparatus. FIG. 29 is a view of a teaching screen 300. The alignment mark 100 is displayed thereon. For example, a point of intersection of sides 10a and 10b of the alignment mark 100 is specified as an alignment point AP100, and the image of the alignment mark 100 and the position of the specified alignment point AP100 are taught to and stored in the defect inspection apparatus.
To locate the testing chip 200 in position in the defect inspection apparatus, the defect inspection apparatus searches the chip 200 located on the stage of the apparatus for the same figure as the taught alignment mark 100, using image signal processing technique. Then, the alignment point AP100 is decided on the basis of the discovered figure.
However, automatical searching of the alignment mark by the defect inspection apparatus is getting increasingly difficult due to, for example, an introduction of a CMP (Chemical Mechanical Polishing) method to a planalization technique for a wafer surface. When the automatical searching by the defect inspection apparatus fails, an operator searches for the alignment mark manually and locates the stage in position. FIG. 30 is an illustration of the testing chip for the manual alignment operation. The operator search the chip 200 for the alignment mark 100 within a lens view field 400 of a lens of the defect inspection apparatus, while moving the chip 200 by driving the stage of the defect inspection apparatus. After discovering the alignment mark 100, the operator decides the alignment point AP100 from the discovered alignment mark 100, following the procedure for designating the alignment point AP100. Then, the testing object which includes the chip 200 is moved by driving the stage of the defect inspection apparatus so that the specified alignment point AP100 is superimposed on a center O of a target scope 50 displayed at the lens view field 400. The target scope center O is the landmark of the apparatus detection point (coordination).
FIG. 31 shows that the alignment mark 100 has the indistinct threefold outline. This kind of phenomenon may occur in both cases where the alignment mark 100 is displayed on the teaching screen 300 so that the alignment point etc. is taught to the defect inspection apparatus, and where the alignment mark 100 is displayed at the lens view field 400 in inspection. Thus, aside from the case where one and the same operator conducts an inspection and teach the alignment point location to the defect inspection apparatus, when one operator conducts an inspection and another operator do the teaching, they may decide that a wrong position be the alignment point because of their differences of recognition of the figure outline. This prevents accurate alignment. Such a problem will arise, for example, when one operator teaches the alignment point AP100 to the defect inspection apparatus while another operator decides an alignment point AP101 in inspection. Further, when the point previously taught at the other process is taught as the alignment point, the same problem will arise because of differences of layers to be formed.
FIGS. 32 to 35 sequentially show the alignment method improving accuracy in alignment. With a coarse alignment mark 100 and a fine alignment mark 101 formed on a chip 201, the testing chip is aligned on the basis of the coarse alignment mark 100 in the same way as described above (see FIG. 33). The chip is then aligned on the basis of the fine alignment mark 101 after the lens set at the defect inspection apparatus is changed into a higher-powered one (see FIGS. 34 and 35). However, since the coarse alignment mark 100 and the fine alignment mark 101 are separately formed, an area necessary to form the alignment mark is increased, and accordingly, an element forming area of the chip 201 is reduced.